| Phase change memory technology GW Burr, MJ Breitwisch, M Franceschini, D Garetto, K Gopalakrishnan, ... Journal of Vacuum Science & Technology B 28 (2), 223-262, 2010 | 1307 | 2010 |
| Role of fluorocarbon film formation in the etching of silicon, silicon dioxide, silicon nitride, and amorphous hydrogenated silicon carbide T Standaert, C Hedlund, EA Joseph, GS Oehrlein, TJ Dalton Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films 22 (1 …, 2004 | 359 | 2004 |
| Write strategies for 2 and 4-bit multi-level phase-change memory T Nirschl, JB Philipp, TD Happ, GW Burr, B Rajendran, MH Lee, A Schrott, ... 2007 IEEE International Electron Devices Meeting, 461-464, 2007 | 351 | 2007 |
| Gate-all-around silicon nanowire 25-stage CMOS ring oscillators with diameter down to 3 nm S Bangsaruntip, A Majumdar, GM Cohen, SU Engelmann, Y Zhang, ... 2010 symposium on VLSI technology, 21-22, 2010 | 327 | 2010 |
| Novel one-mask self-heating pillar phase change memory T Happ, M Breitwisch, A Schrott, J Philipp, M Lee, R Cheek, T Nirschl, ... 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers., 120-121, 2006 | 268 | 2006 |
| Ultra-thin phase-change bridge memory device using GeSb YC Chen, CT Rettner, S Raoux, GW Burr, SH Chen, RM Shelby, ... 2006 International Electron Devices Meeting, 1-4, 2006 | 261 | 2006 |
| Fluorocarbon assisted atomic layer etching of SiO2 using cyclic Ar/C4F8 plasma D Metzler, RL Bruce, S Engelmann, EA Joseph, GS Oehrlein Journal of Vacuum Science & Technology A 32 (2), 2014 | 223 | 2014 |
| Selective sputtering for pattern transfer M Hoinkis, H Miyazoe, E Joseph US Patent 9,493,879, 2016 | 189 | 2016 |
| Copper residue chamber clean M Hoinkis, C Yan, H Miyazoe, E Joseph US Patent 9,114,438, 2015 | 185 | 2015 |
| Two-Dimensional Pattern Formation Using Graphoepitaxy of PS-b-PMMA Block Copolymers for Advanced FinFET Device and Circuit Fabrication H Tsai, JW Pitera, H Miyazoe, S Bangsaruntip, SU Engelmann, CC Liu, ... ACS nano 8 (5), 5227-5232, 2014 | 180 | 2014 |
| Novel lithography-independent pore phase change memory M Breitwisch, T Nirschl, CF Chen, Y Zhu, MH Lee, M Lamorey, GW Burr, ... 2007 IEEE Symposium on VLSI Technology, 100-101, 2007 | 149 | 2007 |
| Method for manufacturing a phase change memory device with pillar bottom electrode HL Lung, CF Chen, YC Chen, SH Chen, CH Lam, EA Joseph, AG Schrott, ... US Patent 8,138,028, 2012 | 145 | 2012 |
| Fluorocarbon assisted atomic layer etching of SiO2 and Si using cyclic Ar/C4F8 and Ar/CHF3 plasma D Metzler, C Li, S Engelmann, RL Bruce, EA Joseph, GS Oehrlein Journal of Vacuum Science & Technology A 34 (1), 2016 | 121 | 2016 |
| A high performance phase change memory with fast switching speed and high temperature retention by engineering the GexSbyTez phase change material HY Cheng, TH Hsu, S Raoux, JY Wu, PY Du, M Breitwisch, Y Zhu, EK Lai, ... 2011 International Electron Devices Meeting, 3.4. 1-3.4. 4, 2011 | 114 | 2011 |
| Racetrack memory cell array with integrated magnetic tunnel junction readout AJ Annunziata, MC Gaidis, L Thomas, CW Chien, CC Hung, P Chevalier, ... 2011 International Electron Devices Meeting, 24.3. 1-24.3. 4, 2011 | 113 | 2011 |
| Transition-metal-oxide-based resistance-change memories SF Karg, GI Meijer, JG Bednorz, CT Rettner, AG Schrott, EA Joseph, ... IBM Journal of Research and Development 52 (4.5), 481-492, 2008 | 105 | 2008 |
| Uniform critical dimension size pore for pcram application MJ Breitwisch, RW Cheek, CH Lam, HL Lung, EA Joseph, AG Schrott US Patent App. 11/620,671, 2008 | 102 | 2008 |
| A three-terminal spin-torque-driven magnetic switch JZ Sun, MC Gaidis, EJ O’Sullivan, EA Joseph, G Hu, DW Abraham, ... Applied physics letters 95 (8), 2009 | 92 | 2009 |
| Fabrication of sub-20 nm nanopore arrays in membranes with embedded metal electrodes at wafer scales J Bai, D Wang, S Nam, H Peng, R Bruce, L Gignac, M Brink, E Kratschmer, ... Nanoscale 6 (15), 8900-8906, 2014 | 87 | 2014 |
| Large-scale (512kbit) integration of multilayer-ready access-devices based on mixed-ionic-electronic-conduction (MIEC) at 100% yield GW Burr, K Virwani, RS Shenoy, A Padilla, M BrightSky, EA Joseph, ... 2012 Symposium on VLSI Technology (VLSIT), 41-42, 2012 | 85 | 2012 |
Sebastian EngelmannIBMVerified email at us.ibm.com
