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Suman Datta
Suman Datta
Joseph M. Pettit Chair Professor
Verified email at gatech.edu - Homepage
Title
Cited by
Cited by
Year
Benchmarking nanotechnology for high-performance and low-power logic transistor applications
R Chau, S Datta, M Doczy, B Doyle, B Jin, J Kavalieros, A Majumdar, ...
IEEE transactions on nanotechnology 4 (2), 153-158, 2005
8732005
High-/spl kappa//metal-gate stack and its MOSFET characteristics
R Chau, S Datta, M Doczy, B Doyle, J Kavalieros, M Metz
IEEE Electron Device Letters 25 (6), 408-410, 2004
732*2004
Two-dimensional gallium nitride realized via graphene encapsulation
ZY Al Balushi, K Wang, RK Ghosh, RA Vilá, SM Eichfeld, JD Caldwell, ...
Nature materials 15 (11), 1166-1171, 2016
7212016
High performance fully-depleted tri-gate CMOS transistors
BS Doyle, S Datta, M Doczy, S Hareland, B Jin, J Kavalieros, T Linton, ...
IEEE Electron Device Letters 24 (4), 263-265, 2003
6752003
The era of hyper-scaling in electronics
S Salahuddin, K Ni, S Datta
Nature electronics 1 (8), 442-450, 2018
5412018
Ferroelectric FET analog synapse for acceleration of deep neural network training
M Jerry, PY Chen, J Zhang, P Sharma, K Ni, S Yu, S Datta
2017 IEEE international electron devices meeting (IEDM), 6.2. 1-6.2. 4, 2017
5362017
The future of ferroelectric field-effect transistor technology
AI Khan, A Keshavarzi, S Datta
Nature Electronics 3 (10), 588-597, 2020
5342020
Tri-gate devices and methods of fabrication
RS Chau, BS Doyle, J Kavalieros, D Barlage, S Datta
US Patent 7,358,121, 2008
5332008
Tri-gate devices and methods of fabrication
RS Chau, BS Doyle, J Kavalieros, D Barlage, S Datta, SA Hareland
US Patent 6,858,478, 2005
5012005
Integrated nanoelectronics for the future
R Chau, B Doyle, S Datta, J Kavalieros, K Zhang
Nature materials 6 (11), 810-812, 2007
4932007
Atomic layer deposition of high dielectric constant gate dielectrics
M Metz, C Boyd, M Kuhn, S Datta, J Kavalieros, M Doczy, J Brask, R Chau
US Patent App. 10/943,693, 2006
4732006
Atomically thin resonant tunnel diodes built from synthetic van der Waals heterostructures
YC Lin, RK Ghosh, R Addou, N Lu, SM Eichfeld, H Zhu, MY Li, X Peng, ...
Nature communications 6 (1), 7311, 2015
4422015
2022 roadmap on neuromorphic computing and engineering
DV Christensen, R Dittmann, B Linares-Barranco, A Sebastian, ...
Neuromorphic Computing and Engineering 2 (2), 022501, 2022
3862022
A steep-slope transistor based on abrupt electronic phase transition
N Shukla, AV Thathachary, A Agrawal, H Paik, A Aziz, DG Schlom, ...
Nature communications 6 (1), 7812, 2015
3842015
Tri-gate fully-depleted CMOS transistors: Fabrication, design and layout
B Doyle, B Boyanov, S Datta, M Doczy, S Hareland, B Jin, J Kavalieros, ...
2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No …, 2003
3592003
Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication
SA Hareland, RS Chau, BS Doyle, R Rios, T Linton, S Datta
US Patent 7,820,513, 2010
3512010
Tri-gate transistor architecture with high-k gate dielectrics, metal gates and strain engineering
J Kavalieros, B Doyle, S Datta, G Dewey, M Doczy, B Jin, D Lionberger, ...
2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers., 50-51, 2006
3452006
Critical Role of Interlayer in Hf0.5Zr0.5O2Ferroelectric FET Nonvolatile Memory Performance
K Ni, P Sharma, J Zhang, M Jerry, JA Smith, K Tapily, R Clark, ...
IEEE Transactions on Electron Devices 65 (6), 2461-2469, 2018
3352018
Method and apparatus for improving stability of a 6T CMOS SRAM cell
S Datta, BS Doyle, RS Chau, J Kavalieros, B Zheng, SA Hareland
US Patent 6,970,373, 2005
3242005
CMOS devices with a single work function gate electrode and method of fabrication
B Doyle, BY Jin, J Kavalieros, S Datta, J Brask, R Chau
US Patent App. 11/238,447, 2007
3192007
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