| Germanium MOSFET devices: Advances in materials understanding, process development, and electrical performance DP Brunco, B De Jaeger, G Eneman, J Mitard, G Hellings, A Satta, ... Journal of The Electrochemical Society 155 (7), H552, 2008 | 348 | 2008 |
| SOT-MRAM 300mm integration for low power and ultrafast embedded memories K Garello, F Yasin, S Couet, L Souriau, J Swerts, S Rao, S Van Beek, ... 2018 IEEE symposium on VLSI Circuits, 81-82, 2018 | 175 | 2018 |
| Manufacturable 300mm platform solution for field-free switching SOT-MRAM K Garello, F Yasin, H Hody, S Couet, L Souriau, SH Sharifi, J Swerts, ... 2019 Symposium on VLSI Circuits, T194-T195, 2019 | 165 | 2019 |
| Low-temperature Ge and GeSn chemical vapor deposition using Ge2H6 F Gencarelli, B Vincent, L Souriau, O Richard, W Vandervorst, R Loo, ... Thin Solid Films 520 (8), 3211-3215, 2012 | 121 | 2012 |
| High quality Ge virtual substrates on Si wafers with standard STI patterning R Loo, G Wang, L Souriau, JC Lin, S Takeuchi, G Brammertz, M Caymax Journal of The Electrochemical Society 157 (1), H13, 2009 | 121 | 2009 |
| A model of threading dislocation density in strain-relaxed Ge and GaAs epitaxial films on Si (100) G Wang, R Loo, E Simoen, L Souriau, M Caymax, MM Heyns, B Blanpain Applied Physics Letters 94 (10), 2009 | 118 | 2009 |
| Capacitor-less, long-retention (> 400s) DRAM cell paving the way towards low-power and high-density monolithic 3D DRAM A Belmonte, H Oh, N Rassoul, GL Donadio, J Mitard, H Dekkers, ... 2020 IEEE International Electron Devices Meeting (IEDM), 28.2. 1-28.2. 4, 2020 | 113 | 2020 |
| Investigation of Microwave Loss Induced by Oxide Regrowth in High-Q Niobium Resonators J Verjauw, A Potočnik, M Mongillo, R Acharya, F Mohiyaddin, G Simion, ... Physical Review Applied 16 (1), 014018, 2021 | 91 | 2021 |
| Nanoscale domain wall devices with magnetic tunnel junction read and write E Raymenants, O Bultynck, D Wan, T Devolder, K Garello, L Souriau, ... Nature Electronics 4 (6), 392-398, 2021 | 83 | 2021 |
| Germanium: The past and possibly a future material for microelectronics DP Brunco, B De Jaeger, G Eneman, A Satta, V Terzieva, L Souriau, ... ECS Transactions 11 (4), 479, 2007 | 61 | 2007 |
| BEOL compatible high tunnel magneto resistance perpendicular magnetic tunnel junctions using a sacrificial Mg layer as CoFeB free layer cap J Swerts, S Mertens, T Lin, S Couet, Y Tomczak, K Sankaran, G Pourtois, ... Applied Physics Letters 106 (26), 2015 | 58 | 2015 |
| Gate-all-around NWFETs vs. triple-gate FinFETs: Junctionless vs. extensionless and conventional junction devices with controlled EWF modulation for multi-VT CMOS A Veloso, G Hellings, MJ Cho, E Simoen, K Devriendt, V Paraschiv, ... 2015 Symposium on VLSI Technology (VLSI Technology), T138-T139, 2015 | 57 | 2015 |
| Reducing EUV mask 3D effects by alternative metal absorbers V Philipsen, KV Luong, L Souriau, E Hendrickx, A Erdmann, D Xu, ... Extreme Ultraviolet (EUV) Lithography VIII 10143, 174-188, 2017 | 44 | 2017 |
| Benefits and side effects of high temperature anneal used to reduce threading dislocation defects in epitaxial Ge layers on Si substrates V Terzieva, L Souriau, M Caymax, DP Brunco, A Moussa, S Van Elshocht, ... Thin Solid Films 517 (1), 172-177, 2008 | 44 | 2008 |
| Reducing extreme ultraviolet mask three-dimensional effects by alternative metal absorbers V Philipsen, KV Luong, L Souriau, A Erdmann, D Xu, P Evanschitzky, ... Journal of Micro/Nanolithography, MEMS, and MOEMS 16 (4), 041002-041002, 2017 | 39 | 2017 |
| High-hole-mobility silicon germanium on insulator substrates with high crystalline quality obtained by the germanium condensation technique L Souriau, T Nguyen, E Augendre, R Loo, V Terzieva, M Caymax, ... Journal of the Electrochemical Society 156 (3), H208, 2009 | 39 | 2009 |
| Smooth and high quality epitaxial strained Ge grown on SiGe strain relaxed buffers with 70–85% Ge R Loo, L Souriau, P Ong, K Kenis, J Rip, P Storck, T Buschhardt, ... Journal of crystal growth 324 (1), 15-21, 2011 | 37 | 2011 |
| Selective epitaxial growth of germanium on Si wafers with shallow trench isolation: an approach for Ge virtual substrates G Wang, FE Leys, L Souriau, R Loo, M Caymax, DP Brunco, J Geypen, ... ECS Transactions 16 (10), 829, 2008 | 37 | 2008 |
| Fabrication of high quality Ge virtual substrates by selective epitaxial growth in shallow trench isolated Si (001) trenches G Wang, R Loo, S Takeuchi, L Souriau, JC Lin, A Moussa, H Bender, ... Thin Solid Films 518 (9), 2538-2541, 2010 | 34 | 2010 |
| Solving the BEOL compatibility challenge of top-pinned magnetic tunnel junction stacks J Swerts, E Liu, S Couet, S Mertens, S Rao, W Kim, K Garello, L Souriau, ... 2017 IEEE International Electron Devices Meeting (IEDM), 38.6. 1-38.6. 4, 2017 | 32 | 2017 |
