Huichu Liu
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Scalable energy-efficient magnetoelectric spin–orbit logic
S Manipatruni, DE Nikonov, CC Lin, TA Gosavi, H Liu, B Prasad, ...
Nature 565 (7737), 35-42, 2019
Tunnel FET technology: A reliability perspective
S Datta, H Liu, V Narayanan
Microelectronics Reliability 54 (5), 861-874, 2014
Analog circuit design using tunnel-FETs
B Sedighi, XS Hu, H Liu, JJ Nahas, M Niemier
IEEE transactions on circuits and systems I: regular papers 62 (1), 39-48, 2014
Low-power, adaptive neuromorphic systems: Recent progress and future directions
A Basu, J Acharya, T Karnik, H Liu, H Li, JS Seo, C Song
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 8 (1), 6-27, 2018
Steep switching tunnel FET: A promise to extend the energy efficient roadmap for post-CMOS digital and analog/RF applications
H Liu, S Datta, V Narayanan
International symposium on low power Electronics and Design (ISLPED), 145-150, 2013
Tunnel FET RF rectifier design for energy harvesting applications
H Liu, X Li, R Vaddi, K Ma, S Datta, V Narayanan
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 4 (4 …, 2014
Demonstration of In0.9Ga0.1As/GaAs0.18Sb0.82 near broken-gap tunnel FET with ION=740μA/μm, GM=70μS/μm and gigahertz switching performance at VDs=0.5V
R Bijesh, H Liu, H Madan, D Mohata, W Li, NV Nguyen, D Gundlach, ...
Electron Devices Meeting (IEDM), 2013 IEEE International, 28.2. 1-28.2. 4, 2013
Soft-error performance evaluation on emerging low power devices
H Liu, M Cotter, S Datta, V Narayanan
IEEE Transactions on Device and Materials Reliability 14 (2), 732-741, 2014
Density tradeoffs of non-volatile memory as a replacement for SRAM based last level cache
K Korgaonkar, I Bhati, H Liu, J Gaur, S Manipatruni, S Subramoney, ...
2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018
Electrical noise in heterojunction interband tunnel FETs
R Pandey, B Rajamohanan, H Liu, V Narayanan, S Datta
IEEE Transactions on Electron Devices 61 (2), 552-560, 2013
Technology assessment of Si and III-V FinFETs and III-V tunnel FETs from soft error rate perspective
H Liu, M Cotter, S Datta, V Narayanan
2012 International Electron Devices Meeting, 25.5. 1-25.5. 4, 2012
Demonstration of p-type In0.7Ga0.3As/GaAs0.35Sb0.65 and n-type GaAs0.4Sb0.6/In0.65Ga0.35As complimentary Heterojunction Vertical Tunnel FETs for …
R Pandey, H Madan, H Liu, V Chobpattana, M Barth, B Rajamohanan, ...
2015 Symposium on VLSI Technology (VLSI Technology), T206-T207, 2015
RF-powered systems using steep-slope devices
X Li, UD Heo, K Ma, V Narayanan, H Liu, S Datta
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS), 73-76, 2014
III–V tunnel FET model with closed-form analytical solution
JU Mehta, WA Borders, H Liu, R Pandey, S Datta, L Lunardi
IEEE Transactions on Electron Devices 63 (5), 2163-2168, 2015
Enabling new computation paradigms with HyperFET-an emerging device
WY Tsai, X Li, M Jerry, B Xie, N Shukla, H Liu, N Chandramoorthy, ...
IEEE Transactions on Multi-Scale Computing Systems 2 (1), 30-48, 2016
Tunnel FET-based ultra-low power, high-sensitivity UHF RFID rectifier
H Liu, R Vaddi, S Datta, V Narayanan
International Symposium on Low Power Electronics and Design (ISLPED), 157-162, 2013
Intrinsic electronic switching time in ultrathin epitaxial vanadium dioxide thin film
A Kar, N Shukla, E Freeman, H Paik, H Liu, R Engel-Herbert, ...
Applied Physics Letters 102 (7), 2013
Tunnel transistors for energy efficient computing
S Datta, R Bijesh, H Liu, D Mohata, V Narayanan
2013 IEEE International Reliability Physics Symposium (IRPS), 6A. 3.1-6A. 3.7, 2013
Evaluation of tunnel FET-based flip-flop designs for low power, high performance applications
M Cotter, H Liu, S Datta, V Narayanan
International Symposium on Quality Electronic Design (ISQED), 430-437, 2013
A steep-slope tunnel FET based SAR analog-to-digital converter
MS Kim, H Liu, X Li, S Datta, V Narayanan
IEEE Transactions on Electron Devices 61 (11), 3661-3667, 2014
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