Follow
Mostafa Ayesh
Title
Cited by
Cited by
Year
26.6 A 5-to-6GHz current-mode subharmonic switching digital power amplifier for enhancing power back-off efficiency
A Zhang, C Yang, M Ayesh, MSW Chen
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 364-366, 2021
182021
Design and analysis of a low-power high-speed charge-steering based StrongARM comparator
MM Ayesh, S Ibrahim, MM Aboudina
2016 28th International Conference on Microelectronics (ICM), 209-212, 2016
172016
A 15.5-mW 20-GSps 4-bit charge-steering flash ADC
MM Ayesh, S Ibrahim, MM Aboudina
2015 IEEE 58th International Midwest Symposium on Circuits and Systems …, 2015
172015
A 29-mW 26.88-GHz non-uniform sub-sampling receiver front-end enabling spectral alias spreading
C Yang, M Ayesh, A Zhang, TF Wu, MSW Chen
2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 87-90, 2020
52020
5.3 A 0.072mm2 18-to-21GHz Non-Uniform Sub-Sampling Receiver with a Non-Uniform Discrete-Time FIR Filter Achieving 42dB Blocker Rejection in 28nm CMOS
M Ayesh, S Mahapatra, C Yang, MSW Chen
2024 IEEE International Solid-State Circuits Conference (ISSCC) 67, 92-94, 2024
42024
A 24-28 GHz Concurrent Harmonic and Subharmonic Tuning Class E/F2,2/3 Subharmonic Switching Power Amplifier Achieving Peak/PBO Efficiency Enhancement
A Zhang, M Ayesh, S Mahapatra, MSW Chen
2021 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2021
32021
A low-power high-speed charge-steering ADC-based equalizer for serial links
MM Ayesh, SA Ibrahim, HF Ragai, MM Rizk
2015 IEEE International Conference on Electronics, Circuits, and Systems …, 2015
32015
Preprint: A Low-Power 20-Gb/s Discrete-Time Analog Front-End for ADC-Based Serial Link Equalizers
M Ayesh, S Ibrahim, MM Aboudina
arXiv preprint arXiv:1902.00233, 2019
12019
26.1: A 24GHz Direct Digital Transmitter Using Multiphase Subharmonic Switching PA Achieving 3.2 Gb/s Data Rate and− 30.8 dB EVM in 65nm CMOS
S Mahapatra, M Ayesh, C Yang, M Palaria, S Su, A Zhang, MSW Chen
2025 IEEE International Solid-State Circuits Conference (ISSCC) 68, 458-460, 2025
2025
11.2 A Blocker-Tolerant Receiver with VCO-Based Non-Uniform Multi-Level Time-Approximation Filter with− 36dB EVM in 28nm CMOS
C Yang, S Su, M Ayesh, S Mahapatra, M Hamada, V Chenna, H Hashemi, ...
2025 IEEE International Solid-State Circuits Conference (ISSCC) 68, 1-3, 2025
2025
A Blocker-Tolerant Non-Uniform Sub-Sampling Receiver With a Non-Uniform Discrete-Time FIR Filter
M Ayesh, S Mahapatra, C Yang, MSW Chen
IEEE Journal of Solid-State Circuits, 2024
2024
Master's Thesis: A Low-Power High-Speed ADC-Based Equalizer for Serial Links
M Ayesh
Faculty of Engineering, Ain Shams University, 2017
2017
The system can't perform the operation now. Try again later.
Articles 1–12